MZ Technologies releases its roadmap for its device/packaging Co-Design EDA tools. The roadmap lays out an agenda of added features and reveals plans for generation 2.0 GENIO IC/package co-design tool.
The first commercially available IC/package co-design tool, GENIO was first marketed in August 2020. The roadmap includes plans for additional features to the current tool set. By first quarter of next year, parasitic estimation capability and stack planning support will be available.
The parasitic estimation enhances GENIO’s time-to-design superiority, which enables early-on system analysis, based on virtual routes, prior to physical implementation. Parasitic estimation should be implemented after a chiplet-based system design and its system-level interconnects have optimized end-to-end 2D-aware signal assignment. Parasitic Estimation then simulates a process-static timing analysis. The more technology information that is available, the more accurate is the estimation.
Stack Planning Support helps the designer to automatically identify the best possible 3D stack configuration, given physical and thermal constraints. This new floor planning methodology provides a more efficient chiplet-based 3D-IC system organization, optimizing for effective heat dissipation and reducing the physical resources (TSVs) required for vertical interconnect.
The roadmap also identifies four other upgrades and reveals plans to introduce GENIO 2.0 sometime in 2023.
First Available Integrated Co-Design Tool
GENIO’s proprietary, fully integrated EDA co-design tool features an end-to-end IC and packaging platform for 2D/2.5D/3D system design. To date, the platform’s environment-agnostic feature has attracted significant interest, with a number of big-name companies conducting feasibility trials.
GENIO integrates existing silicon and package EDA flows to create full co-design and optimization of complex multi-chip designs that comprise advanced heterogeneous microelectronic systems.
“As the company who rolled out the first commercially available co-design tool, we feel an obligation to the EDA community to continue to innovate,” said Anna Fontanelli, Founder and CEO of MZ Technologies. “Advance packaging is clearly the pathway to keeping the spirit of Moore’s Law alive across the entire semiconductor industry spectrum.”
GENIO’s complete cross-hierarchical, 3D-aware, design methodologies streamline the entire IC eco-system. It integrates IC and advanced packaging design to ensure full system-level optimization, shorten the design cycle, drive faster time-to-manufacturing and improve yields.
